DX900: haret-s3c64xx-dx900.patch
| File haret-s3c64xx-dx900.patch, 31.2 kB (added by laforge, 20 months ago) |
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Makefile
diff --git a/Makefile b/Makefile index 8fb3852..cb19987 100644
a b 85 85 MACHOBJS := machines.o \ 86 86 mach-autogen.o \ 87 87 arch-pxa27x.o arch-pxa.o arch-sa.o arch-omap.o arch-s3.o arch-msm.o \ 88 arch-imx.o arch-centrality.o arch-arm.o 88 arch-imx.o arch-centrality.o arch-arm.o arch-s3c64xx.o 89 89 90 90 $(OUT)mach-autogen.o: src/mach/machlist.txt 91 91 @echo " Building machine list" -
haretconsole/regs_s3c.py
diff --git a/haretconsole/regs_s3c.py b/haretconsole/regs_s3c.py index eef93e8..dd54dd6 100644
a b 1 1 # Register definitions for Samsung processors 2 2 # 3 3 # (C) Copyright 2007 Kevin O'Connor <kevin@koconnor.net> 4 # (C) Copyright 2009 Harald Welte <laforge@gnumonks.org> 4 5 # 5 6 # This file may be distributed under the terms of the GNU GPL license. 6 7 … … 70 71 (4, "CAMCLK_SEL"), ("0-3", "CAMCLK_DIV"))), 71 72 } 72 73 memalias.RegsList['ARCH:s3c2442'] = Regs_s3c2442 74 75 ###################################################################### 76 # s3c64xx 77 ###################################################################### 78 79 vic1 = ( 80 (31, "INT_ADC"), (30, "INT_PENDN"), (29, "INT_SEC"), (28, "INT_RTC_ALARM"), 81 (27, "INT_IRDA"), (26, "INT_OTG"), (25, "INT_HSMMC1"), (24, "INT_HSMMC0"), 82 (23, "INT_HOSTIF"), (22, "INT_MSM"), (21, "INT_EINT4"), (20, "INT_HSIrx"), 83 (19, "INT_HSItx"), (18, "INT_I2C"), (17, "INT_SPI1_HSMMC2"), (16, "INT_SPI0"), 84 (15, "INT_UHOST"), (14, "INT_CFC"), (13, "INT_NFC"), (12, "INT_ONENAND1"), 85 (11, "INT_ONENAND0"), (10, "INT_DMA1"), (9, "INT_DMA0"), (8, "INT_UART3"), 86 (7, "INT_UART2"), (6, "INT_UART1"), (5, "INT_UART0"), (4, "INT_AC97"), 87 (3, "INT_PCM1"), (2, "INT_PCM0"), (1, "INT_EINT3"), (0, "INT_EINT2")) 88 89 vic0 = ( 90 (31, "INT_LCD2"), (30, "INT_LCD1"), (29, "INT_LCD0"), (28, "INT_TIMER4"), 91 (27, "INT_TIMER3"), (26, "INT_WDT"), (25, "INT_TIMER2"), (24, "INT_TIMER1"), 92 (23, "INT_TIMER0"), (22, "INT_KEYPAD"), (21, "INT_ARM_DMAS"), 93 (20, "INT_ARM_DMA"), (19, "INT_ARM_DMA_ERR"), (18, "INT_SDMA1"), 94 (17, "INT_SDMA0"), (16, "INT_MFC"), (15, "INT_JPEG"), (14, "INT_BATF"), 95 (13, "INT_SCALAR"), (12, "INT_TVENC"), (11, "INT_2D"), (10, "INT_ROTATOR"), 96 (9, "INT_POST0"), (8, "INT_3D"), (6, "INT_I2S"), 97 (5, "INT_I2C1"), (4, "INT_CAMIF_P"), (3, "INT_CAMIF_C"), (2, "INT_RTC_TIC"), 98 (1, "INT_EINT1"), (0, "INT_EINT0")) 99 100 101 hclkgate = ( 102 (29, "UHOST"), (28, "SECUR"), (27, "SDMA1"), (26, "SDMA0"), (25, "IROM"), 103 (24, "DDR1"), (23, "DDR0"), (22, "MEM1"), (21, "MEM0"), (20, "USB"), 104 (19, "HSMMC2"), (18, "HSMMC1"), (17, "HSMMC0"), (16, "MDP"), (15, "DHOST"), 105 (14, "IHOST"), (13, "DMA1"), (12, "DMA0"), (11, "JPEG"), (10, "CAMIF"), 106 (9, "SCALER"), (8, "2D"), (7, "TV"), (5, "POST0"), 107 (4, "ROT"), (3, "LCD"), (2, "TZIC"), (1, "INTC"), (0, "MFC")) 108 109 pclkgate = ( 110 (27, "IIC1"), (26, "IIS2"), (25, "RESERVED"), (24, "SKEY"), (23, "CHIPID"), 111 (22, "SPI1"), (21, "SPI0"), (20, "HSIRX"), (19, "HSITX"), (18, "GPIO"), 112 (17, "IIC0"), (16, "IIS1"), (15, "IIS0"), (14, "AC97"), (13, "TZPC"), 113 (12, "TSADC"), (11, "KEYPAD"), (10, "IRDA"), (9, "PCM1"), (8, "PCM0"), 114 (7, "PWM"), (6, "RTC"), (5, "WDT"), (4, "UART3"), (3, "UART2"), (2, "UART1"), 115 (1, "UART0"), (0, "MFC")) 116 117 sclkgate = ( 118 (30, "UHOST"), (29, "MMC2_48"), (28, "MMC1_48"), (27, "MMC0_48"), (26, "MMC2"), 119 (25, "MMC1"), (24, "MMC0"), (23, "SPI1_48"), (22, "SPI0_48"), (21, "SPI1"), 120 (20, "SPI0"), (19, "DAC27"), (18, "TV27"), (17, "SCALER27"), (16, "SCALER"), 121 (15, "LCD27"), (14, "LCD"), (13, "FIMC"), (12, "POST0_27"), (11, "AUDIO2"), 122 (10, "POST0"), (9, "AUDIO1"), (8, "AUDIO0"), (7, "SECUR"), (6, "IRDA"), 123 (5, "UART"), (3, "MFC"), (2, "CAM"), (1, "JPEG")) 124 125 Regs_s3c64xx = { 126 0x71200000: ("VICIRQSTATUS0", vic0), 127 0x71300000: ("VICIRQSTATUS1", vic1), 128 129 0x7e00f030: ("HCKL_GATE", hclkgate), 130 0x7e00f034: ("PCLK_GATE", pclkgate), 131 0x7e00f038: ("SCLK_GATE", hclkgate), 132 133 0x7f008004: ("GPADAT", regOneBits("GPA")), 134 0x7f008024: ("GPBDAT", regOneBits("GPB")), 135 0x7f008044: ("GPCDAT", regOneBits("GPC")), 136 0x7f008064: ("GPDDAT", regOneBits("GPD")), 137 0x7f008084: ("GPEDAT", regOneBits("GPE")), 138 0x7f0080a4: ("GPFDAT", regOneBits("GPF")), 139 0x7f0080c4: ("GPGDAT", regOneBits("GPG")), 140 0x7f0080e4: ("GPHDAT", regOneBits("GPH")), 141 0x7f008104: ("GPIDAT", regOneBits("GPI")), 142 0x7f008124: ("GPJDAT", regOneBits("GPJ")), 143 0x7f008808: ("GPKDAT", regOneBits("GPK")), 144 0x7f008818: ("GPLDAT", regOneBits("GPL")), 145 0x7f008824: ("GPMDAT", regOneBits("GPM")), 146 0x7f008834: ("GPNDAT", regOneBits("GPN")), 147 0x7f008144: ("GPODAT", regOneBits("GPO")), 148 0x7f008164: ("GPPDAT", regOneBits("GPP")), 149 0x7f008184: ("GPQDAT", regOneBits("GPQ")), 150 151 0x7f008000: ("GPACON", regTwoBits("GDA")), 152 0x7f008020: ("GPBCON", regTwoBits("GDB")), 153 0x7f008040: ("GPCCON", regTwoBits("GDC")), 154 0x7f008060: ("GPDCON", regTwoBits("GDD")), 155 0x7f008080: ("GPECON", regTwoBits("GDE")), 156 0x7f0080a0: ("GPFCON", regTwoBits("GDF")), 157 0x7f0080c0: ("GPGCON", regTwoBits("GDG")), 158 0x7f0080e0: ("GPHCON", regTwoBits("GDH")), 159 0x7f008100: ("GPICON", regTwoBits("GDI")), 160 0x7f008120: ("GPJCON", regTwoBits("GDJ")), 161 0x7f008800: ("GPKCON0", regTwoBits("GDK0")), 162 0x7f008804: ("GPKCON1", regTwoBits("GDK1")), 163 0x7f008810: ("GPLCON0", regTwoBits("GDL0")), 164 0x7f008814: ("GPLCON1", regTwoBits("GDL1")), 165 0x7f008820: ("GPMCON", regTwoBits("GDM")), 166 0x7f008830: ("GPNCON", regTwoBits("GDN")), 167 0x7f008140: ("GPOCON", regTwoBits("GDO")), 168 0x7f008160: ("GPPCON", regTwoBits("GDP")), 169 0x7f008180: ("GPQCON", regTwoBits("GDQ")), 170 } 171 memalias.RegsList['ARCH:s3c64xx'] = Regs_s3c64xx -
include/arch-s3.h
diff --git a/include/arch-s3.h b/include/arch-s3.h index fb59220..67cf569 100644
a b 16 16 }; 17 17 class MachineS3c2410 : public MachineS3c2442 { 18 18 }; 19 20 // Definitions for Samsung s3c64xx chips. 21 class MachineS3c6400 : public Machine { 22 public: 23 MachineS3c6400(); 24 void init(); 25 int preHardwareShutdown(); 26 void hardwareShutdown(struct fbinfo *fbi); 27 28 uint32 *dma_base[4]; 29 }; 30 31 // XXX - assume they are the same for now. 32 class MachineS3c6410 : public MachineS3c6400 { 33 }; -
include/mach-types.h
diff --git a/include/mach-types.h b/include/mach-types.h index 83d5484..35432b3 100644
a b 1896 1896 #define MACH_TYPE_HTCRAPHAEL 1910 1897 1897 #define MACH_TYPE_SYGDG1 1911 1898 1898 #define MACH_TYPE_SYGDG2 1912 1899 #define MACH_TYPE_DX900 2061 1899 1900 1900 1901 #ifdef CONFIG_ARCH_EBSA110 1901 1902 # ifdef machine_arch_type … … 24505 24506 # define machine_is_sygdg2() (0) 24506 24507 #endif 24507 24508 24509 #ifdef CONFIG_MACH_DX900 24510 # ifdef machine_arch_type 24511 # undef machine_arch_type 24512 # define machine_arch_type __machine_arch_type 24513 # else 24514 # define machine_arch_type MACH_TYPE_DX900 24515 # endif 24516 # define machine_is_dx900() (machine_arch_type == MACH_TYPE_DX900) 24517 #else 24518 # define machine_is_dx900() (0) 24519 #endif 24520 24508 24521 /* 24509 24522 * These have not yet been registered 24510 24523 */ -
(a) /dev/null vs. (b) b/src/mach/arch-s3c64xx.cpp
diff --git a/src/mach/arch-s3c64xx.cpp b/src/mach/arch-s3c64xx.cpp new file mode 100644 index 0000000..f11c5f8
a b 1 #include "arch-s3.h" 2 #include "arch-arm.h" // cpuFlushCache_arm6 3 #include "memory.h" // memPhysMap 4 #include "script.h" // runMemScript 5 6 MachineS3c6400::MachineS3c6400() 7 { 8 name = "Generic Samsung s3c64xx"; 9 flushCache = cpuFlushCache_arm6; 10 archname = "s3c64xx"; 11 CPUInfo[0] = L"SC364xx"; 12 } 13 14 void 15 MachineS3c6400::init() 16 { 17 runMemScript( 18 "set ramaddr 0x30000000\n" 19 // IRQs 20 "addlist IRQS p2v(0x71200000) 0x4030 32 0\n" 21 "addlist IRQS p2v(0x71300000) 0x4030 32 0\n" 22 //"addlist IRQS p2v(0x4A000010) 0x4030 32 0\n" 23 //"addlist IRQS p2v(0x560000a8) 0x0 32 0\n" 24 // GPIOs 25 "addlist GPIOS p2v(0x7f008004)\n" // GPADAT 26 "addlist GPIOS p2v(0x7f008024)\n" // GPBDAT 27 "addlist GPIOS p2v(0x7f008044)\n" // GPCDAT 28 "addlist GPIOS p2v(0x7f008064)\n" // GPDDAT 29 "addlist GPIOS p2v(0x7f008084)\n" // GPEDAT 30 "addlist GPIOS p2v(0x7f0080a4)\n" // GPFDAT 31 "addlist GPIOS p2v(0x7f0080c4)\n" // GPGDAT 32 "addlist GPIOS p2v(0x7f0080e4)\n" // GPHDAT 33 "addlist GPIOS p2v(0x7f008104)\n" // GPIDAT 34 "addlist GPIOS p2v(0x7f008124)\n" // GPJDAT 35 "addlist GPIOS p2v(0x7f008808)\n" // GPKDAT 36 "addlist GPIOS p2v(0x7f008818)\n" // GPLDAT 37 "addlist GPIOS p2v(0x7f008824)\n" // GPMDAT 38 "addlist GPIOS p2v(0x7f008834)\n" // GPNDAT 39 "addlist GPIOS p2v(0x7f008144)\n" // GPODAT 40 "addlist GPIOS p2v(0x7f008164)\n" // GPPDAT 41 "addlist GPIOS p2v(0x7f008184)\n" // GPQDAT 42 // GPIO functions 43 "addlist GPIOS p2v(0x7f008000)\n" // GPACON 44 "addlist GPIOS p2v(0x7f008020)\n" // GPBCON 45 "addlist GPIOS p2v(0x7f008040)\n" // GPCCON 46 "addlist GPIOS p2v(0x7f008060)\n" // GPDCON 47 "addlist GPIOS p2v(0x7f008080)\n" // GPECON 48 "addlist GPIOS p2v(0x7f0080a0)\n" // GPFCON 49 "addlist GPIOS p2v(0x7f0080c0)\n" // GPGCON 50 "addlist GPIOS p2v(0x7f0080e0)\n" // GPHCON 51 "addlist GPIOS p2v(0x7f008100)\n" // GPICON 52 "addlist GPIOS p2v(0x7f008120)\n" // GPJCON 53 "addlist GPIOS p2v(0x7f008800)\n" // GPKCON0 54 "addlist GPIOS p2v(0x7f008804)\n" // GPKCON1 55 "addlist GPIOS p2v(0x7f008810)\n" // GPLCON0 56 "addlist GPIOS p2v(0x7f008814)\n" // GPLCON1 57 "addlist GPIOS p2v(0x7f008820)\n" // GPMCON 58 "addlist GPIOS p2v(0x7f008830)\n" // GPNCON 59 "addlist GPIOS p2v(0x7f008140)\n" // GPOCON 60 "addlist GPIOS p2v(0x7f008160)\n" // GPPCON 61 "addlist GPIOS p2v(0x7f008180)\n" // GPQCON 62 // Clock & Power registers 63 "newvar CLOCKS GPIOS 'Architecture clock and power registers'\n" 64 "addlist CLOCKS p2v(0x7e00f000)\n" // APLL_LOCK 65 "addlist CLOCKS p2v(0x7e00f004)\n" // MPLL_LOCK 66 "addlist CLOCKS p2v(0x7e00f008)\n" // EPLL_LOCK 67 "addlist CLOCKS p2v(0x7e00f00c)\n" // APLL_CON 68 "addlist CLOCKS p2v(0x7e00f010)\n" // MPLL_CON 69 "addlist CLOCKS p2v(0x7e00f014)\n" // EPLL_CON0 70 "addlist CLOCKS p2v(0x7e00f018)\n" // EPLL_CON1 71 "addlist CLOCKS p2v(0x7e00f01c)\n" // CLK_SRC 72 "addlist CLOCKS p2v(0x7e00f020)\n" // CLK_DIV0 73 "addlist CLOCKS p2v(0x7e00f024)\n" // CLK_DIV1 74 "addlist CLOCKS p2v(0x7e00f028)\n" // CLK_DIV2 75 "addlist CLOCKS p2v(0x7e00f02c)\n" // CLK_OUT 76 ); 77 } 78 79 static inline uint32 s3c_readl(volatile uint32 *base, uint32 reg) 80 { 81 return base[reg/4]; 82 } 83 84 static inline void s3c_writel(volatile uint32 *base, uint32 reg, uint32 val) 85 { 86 base[(reg/4)] = val; 87 } 88 89 #define S3C6400_PA_DMAC0 0x75000000 90 #define S3C6400_PA_DMAC1 0x75100000 91 #define S3C6400_PA_DMAC2 0x7db00000 92 #define S3C6400_PA_DMAC3 0x7dc00000 93 94 int 95 MachineS3c6400::preHardwareShutdown() 96 { 97 dma_base[0] = (uint32*)memPhysMap(S3C6400_PA_DMAC0); 98 dma_base[1] = (uint32*)memPhysMap(S3C6400_PA_DMAC1); 99 dma_base[2] = (uint32*)memPhysMap(S3C6400_PA_DMAC2); 100 dma_base[3] = (uint32*)memPhysMap(S3C6400_PA_DMAC3); 101 102 if (!dma_base[0] || !dma_base[1] || !dma_base[2] || !dma_base[3]) 103 return -1; 104 105 return 0; 106 } 107 108 static void 109 s3c6400ShutdownDMA(uint32 *dma_base[4]) 110 { 111 int dma_ctrl, dma_ch; 112 113 /* we have 4 controllers with 8 channels each */ 114 for (dma_ctrl = 0; dma_ctrl < 4; dma_ctrl++) { 115 for (dma_ch = 0; dma_ch < 8; dma_ch ++) { 116 int offset = 0x114 + (dma_ch*0x20); 117 uint32 ctrl; 118 119 /* We don't care about loosing information 120 * in the FIFO's, so we can just do this the 121 * hard way: clear DMACCxConfiguration bit 0 */ 122 ctrl = s3c_readl(dma_base[dma_ctrl], offset) & 0x1; 123 124 if (ctrl & 0x01) 125 s3c_writel(dma_base[dma_ctrl], offset, 126 ctrl & ~0x1); 127 } 128 } 129 130 } 131 132 // Reset USB host. 133 static void 134 ResetUHC(volatile uint32 *uhcmap) 135 { 136 // uhcmap[2] = 1; 137 } 138 139 void 140 MachineS3c6400::hardwareShutdown(struct fbinfo *fbi) 141 { 142 s3c6400ShutdownDMA(dma_base); 143 // ResetUHC(uhcmap); 144 145 } 146 147 REGMACHINE(MachineS3c6400) -
src/mach/machlist.txt
diff --git a/src/mach/machlist.txt b/src/mach/machlist.txt index 4fde689..d11f0a9 100644
a b 90 90 Raphael, MSM7201A,HTC Touch Pro T7272;RAPH100;RAPH800, HTCRAPHAEL, \ 91 91 set ramsize 0x6400000, \ 92 92 set ramaddr 0x20000000 93 M800, S3c2442 ,M800V02, M800 94 X800, S3c2442 ,X800, M800 95 DX900, S3c6400 ,DX900V040, DX900 93 96 94 97 PLATFORM=Jupiter 95 98 Jornada820, SA ,"HP, Jornada 820", JORNADA820 -
(a) /dev/null vs. (b) b/src/wince/cpu-s3c64xx.cpp
diff --git a/src/wince/cpu-s3c64xx.cpp b/src/wince/cpu-s3c64xx.cpp new file mode 100644 index 0000000..66efa51
a b 1 /* 2 Linux loader for Windows CE 3 Copyright (C) 2005 Ben Dooks 4 Copyright (C) 2009 Harald Welte 5 6 For conditions of use see file COPYING 7 8 $Id: cpu-s3c64xx.cpp,v 1.8 2006/11/19 23:37:14 koconnor Exp $ 9 */ 10 11 12 #include "haret.h" 13 #include "xtypes.h" 14 #define CONFIG_ACCEPT_GPL 15 #include "setup.h" 16 #include "memory.h" 17 #include "output.h" 18 #include "gpio.h" 19 #include "video.h" 20 #include "cpu.h" 21 #include "uart.h" 22 #include "resource.h" 23 #include "s3c24xx.h" 24 25 static uint32 *s3c_gpio; 26 27 static inline uint32 s3c_readl(volatile uint32 *base, uint32 reg) 28 { 29 return base[reg/4]; 30 } 31 32 static inline void s3c_writel(volatile uint32 *base, uint32 reg, uint32 val) 33 { 34 base[(reg/4)] = val; 35 } 36 37 #if 0 38 // uart drivers 39 40 #define S3C_UART (0x50008000) 41 42 //#define uart_full(base) (((base)[0x10/4] & (1<<2)) == 0) 43 44 /* general s3c24xx uart support */ 45 46 static volatile uint32 *uart_base; 47 48 static void UART_s3c24xx_map(void) 49 { 50 if (uart_base == NULL) 51 { 52 uart_base = (volatile uint32 *)VirtualAlloc ((void*)0x0, sizeof (void*) * 0xffff, 53 MEM_RESERVE, PAGE_READWRITE); 54 VirtualCopy ((void *)uart_base, (void *) ((S3C_UART)/256), sizeof(void *) * 0xffff, 55 PAGE_READWRITE | PAGE_NOCACHE | PAGE_PHYSICAL); 56 } 57 } 58 59 /* S3C2440 */ 60 61 static void UART_s3c2440_setup() 62 { 63 UART_s3c24xx_map(); 64 65 uart_base[0x00] = 0x43; 66 uart_base[0x01] = 0x8c05; 67 uart_base[0x02] = 0x06; 68 uart_base[0x03] = 0x0; 69 uart_base[0x28/4] = 0x120; 70 71 //UART_s3c24xx_puts("testing UART...\n\r"); 72 } 73 74 static void UART_s3c2440_checksetup(void) 75 { 76 if (uart_base[0x00] != 0x43) 77 uart_base[0x00] = 0x43; 78 if (uart_base[0x01] != 0x8c05) 79 uart_base[0x01] = 0x8c05; 80 if (uart_base[0x02] & 0x01) 81 uart_base[0x02] = 0x06; 82 if (uart_base[0x03] != 0) 83 uart_base[0x03] = 0; 84 } 85 86 static int UART_s3c2440_full(volatile uint32 *base) 87 { 88 if (s3c_readl(base, S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) 89 return s3c_readl(base, S3C2410_UFSTAT) & S3C2440_UFSTAT_TXFULL; 90 91 return !(s3c_readl(base, S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXFE); 92 } 93 94 static void UART_s3c2440_putc(char c) 95 { 96 if (uart_base == NULL) 97 UART_s3c2440_setup (); 98 99 UART_s3c2440_checksetup (); 100 101 while(UART_s3c2440_full(uart_base)) 102 UART_s3c2440_checksetup (); 103 104 ((volatile u8 *)uart_base)[S3C2410_UTXH] = c; 105 } 106 107 static void UART_s3c2440_puts (char *s) 108 { 109 int a = 0; 110 111 while (s [a]) 112 { 113 UART_s3c2440_putc (s [a]); 114 a++; 115 } 116 } 117 118 static struct uart_drv s3c2440_uarts = 119 { 120 UART_s3c2440_setup, 121 UART_s3c2440_puts 122 }; 123 124 /* S3C2410 UART driver */ 125 126 static int UART_s3c2410_full (volatile uint32 *base) 127 { 128 if (s3c_readl(base, S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) 129 return s3c_readl (base, S3C2410_UFSTAT) & S3C2410_UFSTAT_TXFULL; 130 131 return !(s3c_readl (base, S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXFE); 132 } 133 134 static void UART_s3c2410_checksetup(void) 135 { 136 } 137 138 static void UART_s3c2410_setup (void) 139 { 140 UART_s3c24xx_map(); 141 } 142 143 static void UART_s3c2410_putc (char c) 144 { 145 if (uart_base == NULL) 146 UART_s3c2410_setup (); 147 148 UART_s3c2410_checksetup (); 149 150 while(UART_s3c2410_full(uart_base)) 151 UART_s3c2410_checksetup (); 152 153 ((volatile u8 *)uart_base) [S3C2410_UTXH] = c; 154 } 155 156 static void UART_s3c2410_puts (char *s) 157 { 158 int a = 0; 159 160 while (s [a]) 161 { 162 UART_s3c2440_putc (s [a]); 163 a++; 164 } 165 } 166 167 static bool s3c24xxDetect () 168 { 169 uint32 p15r0 = cpuGetCP (15, 0); 170 171 // please add proper detection for Samsung CPUs 172 #if 0 173 if ((p15r0 >> 24) == 'i' 174 && ((p15r0 >> 13) & 7) == 1) 175 return true; 176 #endif 177 178 return false; 179 } 180 181 static struct uart_drv s3c2410_uarts = 182 { 183 UART_s3c2410_setup, 184 UART_s3c2410_puts 185 }; 186 187 #endif 188 189 static int s3c64xxSetupLoad (void) 190 { 191 uint32 s3c_ver; 192 193 s3c_gpio = (uint32 *)memPhysMap(S3C6400_PA_GPIO); 194 s3c_sys = (uint32 *)memPhysMap(S3C_PA_SYS); 195 196 s3c_ver = s3c_readl(s3c_sys, 0x118); 197 198 if (s3c_ver & 0xfffff000 == 0x36400000) { 199 //UART_setDriver(&s3c6400_uarts); 200 Output(L"Detected S3C6400, Version %d\n", s3c_ver & 0xfff) 201 } else if (s3c_ver & 0xffffff00 == 0x36410100) { 202 //UART_setDriver(&s3c6410_uarts); 203 Output(L"Detected S3C6410, Version %d\n", s3c_ver & 0xff) 204 } else 205 Output(L"Unknown S3C64XX, ID 0x%08x\n", s3c_ver); 206 207 return 0; 208 } 209 210 // TODO - sort out shutting down IIS, DMA, etc 211 212 static void s3c64xxShutdownIIS (void) 213 { 214 215 } 216 217 const u_int32_t *dma_base[] = 218 { 0x75000000, 0x75100000, 0x7db00000, 0x7dc00000 }; 219 220 static void s3c64xxShutdownDMA (void) 221 { 222 int dma_ctrl, dma_ch; 223 224 /* we have 4 controllers with 8 channels each */ 225 for (dma_ctrl = 0; dma_ctrl < 4; dma_ctrl++) { 226 for (dma_ch = 0; dma_ch < 8; dma_ch ++) { 227 int offset = 0x114 + (dma_ch*0x20); 228 u_int32_t ctrl; 229 230 /* We don't care about loosing information 231 * in the FIFO's, so we can just do this the 232 * hard way: clear DMACCxConfiguration bit 0 */ 233 ctrl = s3c_readl(dma_base[dma_ctrl], offset) & 0x1) 234 235 if (ctrl & 0x01) 236 s3c_writel(dma_base[dma_ctrl], offset, 237 ctrl & ~0x1); 238 } 239 } 240 } 241 242 static int s3c64xxShutdownPerihperals(void) 243 { 244 s3c64xxShutdownIIS (); 245 s3c64xxShutdownDMA (); 246 247 return 0; 248 } 249 250 static int s3c64xxAttemptRecovery(void) 251 { 252 return 0; 253 } 254 255 struct cpu_fns cpu_s3c24xx = 256 { 257 L"S3C64XX", 258 s3c64xxDetect, 259 s3c64xxSetupLoad, 260 s3c64xxShutdownPerihperals, 261 s3c64xxAttemptRecovery 262 }; -
src/wince/haret.vcp
diff --git a/src/wince/haret.vcp b/src/wince/haret.vcp index 2699cf6..4a3dd79 100644
a b 1797 1797 # End Source File 1798 1798 # Begin Source File 1799 1799 1800 SOURCE=".\cpu-s3c64xx.cpp" 1801 1802 !IF "$(CFG)" == "haret - Win32 (WCE x86) Release" 1803 1804 DEP_CPP_CPU_S=\ 1805 "..\..\include\cpu.h"\ 1806 "..\..\include\gpio.h"\ 1807 "..\..\include\haret.h"\ 1808 "..\..\include\output.h"\ 1809 "..\..\include\pxa2xx.h"\ 1810 "..\..\include\resource.h"\ 1811 "..\..\include\s3c64xx.h"\ 1812 "..\..\include\s3c64xx\map.h"\ 1813 "..\..\include\s3c64xx\regs-dma.h"\ 1814 "..\..\include\s3c64xx\regs-gpio.h"\ 1815 "..\..\include\s3c64xx\regs-serial.h"\ 1816 "..\..\include\setup.h"\ 1817 "..\..\include\uart.h"\ 1818 "..\..\include\video.h"\ 1819 "..\..\include\xtypes.h"\ 1820 1821 1822 !ELSEIF "$(CFG)" == "haret - Win32 (WCE x86) Debug" 1823 1824 DEP_CPP_CPU_S=\ 1825 "..\..\include\cpu.h"\ 1826 "..\..\include\gpio.h"\ 1827 "..\..\include\haret.h"\ 1828 "..\..\include\output.h"\ 1829 "..\..\include\pxa2xx.h"\ 1830 "..\..\include\resource.h"\ 1831 "..\..\include\s3c64xx.h"\ 1832 "..\..\include\s3c64xx\map.h"\ 1833 "..\..\include\s3c64xx\regs-dma.h"\ 1834 "..\..\include\s3c64xx\regs-gpio.h"\ 1835 "..\..\include\s3c64xx\regs-serial.h"\ 1836 "..\..\include\setup.h"\ 1837 "..\..\include\uart.h"\ 1838 "..\..\include\video.h"\ 1839 "..\..\include\xtypes.h"\ 1840 1841 1842 !ELSEIF "$(CFG)" == "haret - Win32 (WCE SH4) Release" 1843 1844 DEP_CPP_CPU_S=\ 1845 "..\..\include\cpu.h"\ 1846 "..\..\include\gpio.h"\ 1847 "..\..\include\haret.h"\ 1848 "..\..\include\output.h"\ 1849 "..\..\include\pxa2xx.h"\ 1850 "..\..\include\resource.h"\ 1851 "..\..\include\s3c64xx.h"\ 1852 "..\..\include\s3c64xx\map.h"\ 1853 "..\..\include\s3c64xx\regs-dma.h"\ 1854 "..\..\include\s3c64xx\regs-gpio.h"\ 1855 "..\..\include\s3c64xx\regs-serial.h"\ 1856 "..\..\include\setup.h"\ 1857 "..\..\include\uart.h"\ 1858 "..\..\include\video.h"\ 1859 "..\..\include\xtypes.h"\ 1860 1861 1862 !ELSEIF "$(CFG)" == "haret - Win32 (WCE SH4) Debug" 1863 1864 DEP_CPP_CPU_S=\ 1865 "..\..\include\cpu.h"\ 1866 "..\..\include\gpio.h"\ 1867 "..\..\include\haret.h"\ 1868 "..\..\include\output.h"\ 1869 "..\..\include\pxa2xx.h"\ 1870 "..\..\include\resource.h"\ 1871 "..\..\include\s3c64xx.h"\ 1872 "..\..\include\s3c64xx\map.h"\ 1873 "..\..\include\s3c64xx\regs-dma.h"\ 1874 "..\..\include\s3c64xx\regs-gpio.h"\ 1875 "..\..\include\s3c64xx\regs-serial.h"\ 1876 "..\..\include\setup.h"\ 1877 "..\..\include\uart.h"\ 1878 "..\..\include\video.h"\ 1879 "..\..\include\xtypes.h"\ 1880 1881 1882 !ELSEIF "$(CFG)" == "haret - Win32 (WCE SH3) Release" 1883 1884 DEP_CPP_CPU_S=\ 1885 "..\..\include\cpu.h"\ 1886 "..\..\include\gpio.h"\ 1887 "..\..\include\haret.h"\ 1888 "..\..\include\output.h"\ 1889 "..\..\include\pxa2xx.h"\ 1890 "..\..\include\resource.h"\ 1891 "..\..\include\s3c64xx.h"\ 1892 "..\..\include\s3c64xx\map.h"\ 1893 "..\..\include\s3c64xx\regs-dma.h"\ 1894 "..\..\include\s3c64xx\regs-gpio.h"\ 1895 "..\..\include\s3c64xx\regs-serial.h"\ 1896 "..\..\include\setup.h"\ 1897 "..\..\include\uart.h"\ 1898 "..\..\include\video.h"\ 1899 "..\..\include\xtypes.h"\ 1900 1901 1902 !ELSEIF "$(CFG)" == "haret - Win32 (WCE SH3) Debug" 1903 1904 DEP_CPP_CPU_S=\ 1905 "..\..\include\cpu.h"\ 1906 "..\..\include\gpio.h"\ 1907 "..\..\include\haret.h"\ 1908 "..\..\include\output.h"\ 1909 "..\..\include\pxa2xx.h"\ 1910 "..\..\include\resource.h"\ 1911 "..\..\include\s3c64xx.h"\ 1912 "..\..\include\s3c64xx\map.h"\ 1913 "..\..\include\s3c64xx\regs-dma.h"\ 1914 "..\..\include\s3c64xx\regs-gpio.h"\ 1915 "..\..\include\s3c64xx\regs-serial.h"\ 1916 "..\..\include\setup.h"\ 1917 "..\..\include\uart.h"\ 1918 "..\..\include\video.h"\ 1919 "..\..\include\xtypes.h"\ 1920 1921 1922 !ELSEIF "$(CFG)" == "haret - Win32 (WCE emulator) Release" 1923 1924 DEP_CPP_CPU_S=\ 1925 "..\..\include\cpu.h"\ 1926 "..\..\include\gpio.h"\ 1927 "..\..\include\haret.h"\ 1928 "..\..\include\output.h"\ 1929 "..\..\include\pxa2xx.h"\ 1930 "..\..\include\resource.h"\ 1931 "..\..\include\s3c64xx.h"\ 1932 "..\..\include\s3c64xx\map.h"\ 1933 "..\..\include\s3c64xx\regs-dma.h"\ 1934 "..\..\include\s3c64xx\regs-gpio.h"\ 1935 "..\..\include\s3c64xx\regs-serial.h"\ 1936 "..\..\include\setup.h"\ 1937 "..\..\include\uart.h"\ 1938 "..\..\include\video.h"\ 1939 "..\..\include\xtypes.h"\ 1940 1941 1942 !ELSEIF "$(CFG)" == "haret - Win32 (WCE emulator) Debug" 1943 1944 DEP_CPP_CPU_S=\ 1945 "..\..\include\cpu.h"\ 1946 "..\..\include\gpio.h"\ 1947 "..\..\include\haret.h"\ 1948 "..\..\include\output.h"\ 1949 "..\..\include\pxa2xx.h"\ 1950 "..\..\include\resource.h"\ 1951 "..\..\include\s3c64xx.h"\ 1952 "..\..\include\s3c64xx\map.h"\ 1953 "..\..\include\s3c64xx\regs-dma.h"\ 1954 "..\..\include\s3c64xx\regs-gpio.h"\ 1955 "..\..\include\s3c64xx\regs-serial.h"\ 1956 "..\..\include\setup.h"\ 1957 "..\..\include\uart.h"\ 1958 "..\..\include\video.h"\ 1959 "..\..\include\xtypes.h"\ 1960 1961 1962 !ELSEIF "$(CFG)" == "haret - Win32 (WCE MIPSIV_FP) Release" 1963 1964 DEP_CPP_CPU_S=\ 1965 "..\..\include\cpu.h"\ 1966 "..\..\include\gpio.h"\ 1967 "..\..\include\haret.h"\ 1968 "..\..\include\output.h"\ 1969 "..\..\include\pxa2xx.h"\ 1970 "..\..\include\resource.h"\ 1971 "..\..\include\s3c64xx.h"\ 1972 "..\..\include\s3c64xx\map.h"\ 1973 "..\..\include\s3c64xx\regs-dma.h"\ 1974 "..\..\include\s3c64xx\regs-gpio.h"\ 1975 "..\..\include\s3c64xx\regs-serial.h"\ 1976 "..\..\include\setup.h"\ 1977 "..\..\include\uart.h"\ 1978 "..\..\include\video.h"\ 1979 "..\..\include\xtypes.h"\ 1980 1981 1982 !ELSEIF "$(CFG)" == "haret - Win32 (WCE MIPSIV_FP) Debug" 1983 1984 DEP_CPP_CPU_S=\ 1985 "..\..\include\cpu.h"\ 1986 "..\..\include\gpio.h"\ 1987 "..\..\include\haret.h"\ 1988 "..\..\include\output.h"\ 1989 "..\..\include\pxa2xx.h"\ 1990 "..\..\include\resource.h"\ 1991 "..\..\include\s3c64xx.h"\ 1992 "..\..\include\s3c64xx\map.h"\ 1993 "..\..\include\s3c64xx\regs-dma.h"\ 1994 "..\..\include\s3c64xx\regs-gpio.h"\ 1995 "..\..\include\s3c64xx\regs-serial.h"\ 1996 "..\..\include\setup.h"\ 1997 "..\..\include\uart.h"\ 1998 "..\..\include\video.h"\ 1999 "..\..\include\xtypes.h"\ 2000 2001 2002 !ELSEIF "$(CFG)" == "haret - Win32 (WCE MIPSIV) Release" 2003 2004 DEP_CPP_CPU_S=\ 2005 "..\..\include\cpu.h"\ 2006 "..\..\include\gpio.h"\ 2007 "..\..\include\haret.h"\ 2008 "..\..\include\output.h"\ 2009 "..\..\include\pxa2xx.h"\ 2010 "..\..\include\resource.h"\ 2011 "..\..\include\s3c64xx.h"\ 2012 "..\..\include\s3c64xx\map.h"\ 2013 "..\..\include\s3c64xx\regs-dma.h"\ 2014 "..\..\include\s3c64xx\regs-gpio.h"\ 2015 "..\..\include\s3c64xx\regs-serial.h"\ 2016 "..\..\include\setup.h"\ 2017 "..\..\include\uart.h"\ 2018 "..\..\include\video.h"\ 2019 "..\..\include\xtypes.h"\ 2020 2021 2022 !ELSEIF "$(CFG)" == "haret - Win32 (WCE MIPSIV) Debug" 2023 2024 DEP_CPP_CPU_S=\ 2025 "..\..\include\cpu.h"\ 2026 "..\..\include\gpio.h"\ 2027 "..\..\include\haret.h"\ 2028 "..\..\include\output.h"\ 2029 "..\..\include\pxa2xx.h"\ 2030 "..\..\include\resource.h"\ 2031 "..\..\include\s3c64xx.h"\ 2032 "..\..\include\s3c64xx\map.h"\ 2033 "..\..\include\s3c64xx\regs-dma.h"\ 2034 "..\..\include\s3c64xx\regs-gpio.h"\ 2035 "..\..\include\s3c64xx\regs-serial.h"\ 2036 "..\..\include\setup.h"\ 2037 "..\..\include\uart.h"\ 2038 "..\..\include\video.h"\ 2039 "..\..\include\xtypes.h"\ 2040 2041 2042 !ELSEIF "$(CFG)" == "haret - Win32 (WCE MIPS16) Release" 2043 2044 DEP_CPP_CPU_S=\ 2045 "..\..\include\cpu.h"\ 2046 "..\..\include\gpio.h"\ 2047 "..\..\include\haret.h"\ 2048 "..\..\include\output.h"\ 2049 "..\..\include\pxa2xx.h"\ 2050 "..\..\include\resource.h"\ 2051 "..\..\include\s3c64xx.h"\ 2052 "..\..\include\s3c64xx\map.h"\ 2053 "..\..\include\s3c64xx\regs-dma.h"\ 2054 "..\..\include\s3c64xx\regs-gpio.h"\ 2055 "..\..\include\s3c64xx\regs-serial.h"\ 2056 "..\..\include\setup.h"\ 2057 "..\..\include\uart.h"\ 2058 "..\..\include\video.h"\ 2059 "..\..\include\xtypes.h"\ 2060 2061 2062 !ELSEIF "$(CFG)" == "haret - Win32 (WCE MIPS16) Debug" 2063 2064 DEP_CPP_CPU_S=\ 2065 "..\..\include\cpu.h"\ 2066 "..\..\include\gpio.h"\ 2067 "..\..\include\haret.h"\ 2068 "..\..\include\output.h"\ 2069 "..\..\include\pxa2xx.h"\ 2070 "..\..\include\resource.h"\ 2071 "..\..\include\s3c64xx.h"\ 2072 "..\..\include\s3c64xx\map.h"\ 2073 "..\..\include\s3c64xx\regs-dma.h"\ 2074 "..\..\include\s3c64xx\regs-gpio.h"\ 2075 "..\..\include\s3c64xx\regs-serial.h"\ 2076 "..\..\include\setup.h"\ 2077 "..\..\include\uart.h"\ 2078 "..\..\include\video.h"\ 2079 "..\..\include\xtypes.h"\ 2080 2081 2082 !ELSEIF "$(CFG)" == "haret - Win32 (WCE MIPSII_FP) Release" 2083 2084 DEP_CPP_CPU_S=\ 2085 "..\..\include\cpu.h"\ 2086 "..\..\include\gpio.h"\ 2087 "..\..\include\haret.h"\ 2088 "..\..\include\output.h"\ 2089 "..\..\include\pxa2xx.h"\ 2090 "..\..\include\resource.h"\ 2091 "..\..\include\s3c64xx.h"\ 2092 "..\..\include\s3c64xx\map.h"\ 2093 "..\..\include\s3c64xx\regs-dma.h"\ 2094 "..\..\include\s3c64xx\regs-gpio.h"\ 2095 "..\..\include\s3c64xx\regs-serial.h"\ 2096 "..\..\include\setup.h"\ 2097 "..\..\include\uart.h"\ 2098 "..\..\include\video.h"\ 2099 "..\..\include\xtypes.h"\ 2100 2101 2102 !ELSEIF "$(CFG)" == "haret - Win32 (WCE MIPSII_FP) Debug" 2103 2104 DEP_CPP_CPU_S=\ 2105 "..\..\include\cpu.h"\ 2106 "..\..\include\gpio.h"\ 2107 "..\..\include\haret.h"\ 2108 "..\..\include\output.h"\ 2109 "..\..\include\pxa2xx.h"\ 2110 "..\..\include\resource.h"\ 2111 "..\..\include\s3c64xx.h"\ 2112 "..\..\include\s3c64xx\map.h"\ 2113 "..\..\include\s3c64xx\regs-dma.h"\ 2114 "..\..\include\s3c64xx\regs-gpio.h"\ 2115 "..\..\include\s3c64xx\regs-serial.h"\ 2116 "..\..\include\setup.h"\ 2117 "..\..\include\uart.h"\ 2118 "..\..\include\video.h"\ 2119 "..\..\include\xtypes.h"\ 2120 2121 2122 !ELSEIF "$(CFG)" == "haret - Win32 (WCE MIPSII) Release" 2123 2124 DEP_CPP_CPU_S=\ 2125 "..\..\include\cpu.h"\ 2126 "..\..\include\gpio.h"\ 2127 "..\..\include\haret.h"\ 2128 "..\..\include\output.h"\ 2129 "..\..\include\pxa2xx.h"\ 2130 "..\..\include\resource.h"\ 2131 "..\..\include\s3c64xx.h"\ 2132 "..\..\include\s3c64xx\map.h"\ 2133 "..\..\include\s3c64xx\regs-dma.h"\ 2134 "..\..\include\s3c64xx\regs-gpio.h"\ 2135 "..\..\include\s3c64xx\regs-serial.h"\ 2136 "..\..\include\setup.h"\ 2137 "..\..\include\uart.h"\ 2138 "..\..\include\video.h"\ 2139 "..\..\include\xtypes.h"\ 2140 2141 2142 !ELSEIF "$(CFG)" == "haret - Win32 (WCE MIPSII) Debug" 2143 2144 DEP_CPP_CPU_S=\ 2145 "..\..\include\cpu.h"\ 2146 "..\..\include\gpio.h"\ 2147 "..\..\include\haret.h"\ 2148 "..\..\include\output.h"\ 2149 "..\..\include\pxa2xx.h"\ 2150 "..\..\include\resource.h"\ 2151 "..\..\include\s3c64xx.h"\ 2152 "..\..\include\s3c64xx\map.h"\ 2153 "..\..\include\s3c64xx\regs-dma.h"\ 2154 "..\..\include\s3c64xx\regs-gpio.h"\ 2155 "..\..\include\s3c64xx\regs-serial.h"\ 2156 "..\..\include\setup.h"\ 2157 "..\..\include\uart.h"\ 2158 "..\..\include\video.h"\ 2159 "..\..\include\xtypes.h"\ 2160 2161 2162 !ELSEIF "$(CFG)" == "haret - Win32 (WCE ARMV4T) Release" 2163 2164 DEP_CPP_CPU_S=\ 2165 "..\..\include\cpu.h"\ 2166 "..\..\include\gpio.h"\ 2167 "..\..\include\haret.h"\ 2168 "..\..\include\output.h"\ 2169 "..\..\include\pxa2xx.h"\ 2170 "..\..\include\resource.h"\ 2171 "..\..\include\s3c64xx.h"\ 2172 "..\..\include\s3c64xx\map.h"\ 2173 "..\..\include\s3c64xx\regs-dma.h"\ 2174 "..\..\include\s3c64xx\regs-gpio.h"\ 2175 "..\..\include\s3c64xx\regs-serial.h"\ 2176 "..\..\include\setup.h"\ 2177 "..\..\include\uart.h"\ 2178 "..\..\include\video.h"\ 2179 "..\..\include\xtypes.h"\ 2180 2181 2182 !ELSEIF "$(CFG)" == "haret - Win32 (WCE ARMV4T) Debug" 2183 2184 DEP_CPP_CPU_S=\ 2185 "..\..\include\cpu.h"\ 2186 "..\..\include\gpio.h"\ 2187 "..\..\include\haret.h"\ 2188 "..\..\include\output.h"\ 2189 "..\..\include\pxa2xx.h"\ 2190 "..\..\include\resource.h"\ 2191 "..\..\include\s3c64xx.h"\ 2192 "..\..\include\s3c64xx\map.h"\ 2193 "..\..\include\s3c64xx\regs-dma.h"\ 2194 "..\..\include\s3c64xx\regs-gpio.h"\ 2195 "..\..\include\s3c64xx\regs-serial.h"\ 2196 "..\..\include\setup.h"\ 2197 "..\..\include\uart.h"\ 2198 "..\..\include\video.h"\ 2199 "..\..\include\xtypes.h"\ 2200 2201 2202 !ELSEIF "$(CFG)" == "haret - Win32 (WCE ARMV4I) Release" 2203 2204 DEP_CPP_CPU_S=\ 2205 "..\..\include\cpu.h"\ 2206 "..\..\include\gpio.h"\ 2207 "..\..\include\haret.h"\ 2208 "..\..\include\output.h"\ 2209 "..\..\include\pxa2xx.h"\ 2210 "..\..\include\resource.h"\ 2211 "..\..\include\s3c64xx.h"\ 2212 "..\..\include\s3c64xx\map.h"\ 2213 "..\..\include\s3c64xx\regs-dma.h"\ 2214 "..\..\include\s3c64xx\regs-gpio.h"\ 2215 "..\..\include\s3c64xx\regs-serial.h"\ 2216 "..\..\include\setup.h"\ 2217 "..\..\include\uart.h"\ 2218 "..\..\include\video.h"\ 2219 "..\..\include\xtypes.h"\ 2220 2221 2222 !ELSEIF "$(CFG)" == "haret - Win32 (WCE ARMV4I) Debug" 2223 2224 DEP_CPP_CPU_S=\ 2225 "..\..\include\cpu.h"\ 2226 "..\..\include\gpio.h"\ 2227 "..\..\include\haret.h"\ 2228 "..\..\include\output.h"\ 2229 "..\..\include\pxa2xx.h"\ 2230 "..\..\include\resource.h"\ 2231 "..\..\include\s3c64xx.h"\ 2232 "..\..\include\s3c64xx\map.h"\ 2233 "..\..\include\s3c64xx\regs-dma.h"\ 2234 "..\..\include\s3c64xx\regs-gpio.h"\ 2235 "..\..\include\s3c64xx\regs-serial.h"\ 2236 "..\..\include\setup.h"\ 2237 "..\..\include\uart.h"\ 2238 "..\..\include\video.h"\ 2239 "..\..\include\xtypes.h"\ 2240 2241 2242 !ELSEIF "$(CFG)" == "haret - Win32 (WCE ARMV4) Release" 2243 2244 DEP_CPP_CPU_S=\ 2245 "..\..\include\cpu.h"\ 2246 "..\..\include\gpio.h"\ 2247 "..\..\include\haret.h"\ 2248 "..\..\include\output.h"\ 2249 "..\..\include\pxa2xx.h"\ 2250 "..\..\include\resource.h"\ 2251 "..\..\include\s3c64xx.h"\ 2252 "..\..\include\s3c64xx\map.h"\ 2253 "..\..\include\s3c64xx\regs-dma.h"\ 2254 "..\..\include\s3c64xx\regs-gpio.h"\ 2255 "..\..\include\s3c64xx\regs-serial.h"\ 2256 "..\..\include\setup.h"\ 2257 "..\..\include\uart.h"\ 2258 "..\..\include\video.h"\ 2259 "..\..\include\xtypes.h"\ 2260 2261 2262 !ELSEIF "$(CFG)" == "haret - Win32 (WCE ARMV4) Debug" 2263 2264 DEP_CPP_CPU_S=\ 2265 "..\..\include\cpu.h"\ 2266 "..\..\include\gpio.h"\ 2267 "..\..\include\haret.h"\ 2268 "..\..\include\output.h"\ 2269 "..\..\include\pxa2xx.h"\ 2270 "..\..\include\resource.h"\ 2271 "..\..\include\s3c64xx.h"\ 2272 "..\..\include\s3c64xx\map.h"\ 2273 "..\..\include\s3c64xx\regs-dma.h"\ 2274 "..\..\include\s3c64xx\regs-gpio.h"\ 2275 "..\..\include\s3c64xx\regs-serial.h"\ 2276 "..\..\include\setup.h"\ 2277 "..\..\include\uart.h"\ 2278 "..\..\include\video.h"\ 2279 "..\..\include\xtypes.h"\ 2280 2281 2282 !ENDIF 2283 2284 # End Source File 2285 # Begin Source File 2286 1800 2287 SOURCE=".\cpu-s3c24xx.cpp" 1801 2288 1802 2289 !IF "$(CFG)" == "haret - Win32 (WCE x86) Release"
